The Regularized Fast Hartley Transform Low-Complexity Parallel Computation of the FHT in One and Multiple Dimensions

This book describes how a key signal/image processing algorithm – that of the fast Hartley transform (FHT) or, via a simple conversion routine between their outputs, of the real-data version of the ubiquitous fast Fourier transform (FFT) – might best be formulated to facilitate computationally-efficient solutions. The author discusses this for both 1-D (such as required, for example, for the spectrum analysis of audio signals) and m-D (such as required, for example, for the compression of noisy 2-D images or the watermarking of 3-D video signals) cases, but requiring few computing resources (i.e. low arithmetic/memory/power requirements, etc.). This is particularly relevant for those application areas, such as mobile communications, where the available silicon resources (as well as the battery-life) are expected to be limited. The aim of this monograph, where silicon-based computing technology and a resource-constrained environment is assumed and the data is real-valued in nature, hasthus been to seek solutions that best match the actual problem needing to be solved.

Part 1: The Discrete Fourier and Hartley Transforms.- Background to Research.- The Real-Data Discrete Fourier Transform.- The Discrete Hartley Transform.- Part 2: The Regularized Fast Hartley Transform.- Derivation of Regularized Formulation of Fast Hartley Transform.- Design Strategy for Silicon-Based Implementation of Regularized Fast Hartley Transform.- Architecture for Silicon-Based Implementation of Regularized Fast Hartley Transform.- Design of CORDIC-Based Processing Element for Regularized Fast Hartley Transform.- Part 3: Applications of Regularized Fast Hartley Transform.- Derivation of Radix-2 Real-Data Fast Fourier Transform Algorithms using Regularized Fast Hartley Transform.- Computation of Common DSP-Based Functions using Regularized Fast Hartley Transform .- Part 4: The Multi-Dimensional Discrete Hartley Transform.- Parallel Reordering and Transfer of Data between Partitioned Memories of Discrete Hartley Transform for 1-D and m-D Cases.- Architectures for Silicon-Based Implementation of m-D Discrete Hartley Transform using Regularized Fast Hartley Transform.- Part 5: Results of Research.- Summary and Conclusions.